Heat is inevitably generated during operation of a semiconductor device, and may become destructive of the device if left unabated. Therefore, it is generally well known to provide some sort of heat sink for such devices. Generally, heat sinks take one of two forms. They may be integral with the device package or they may be external to the device package. In either case, heat sinks generally include a thermal mass in intimate heat conductive relationship to the semiconductor device, and may involve air convection or forced air cooling of the thermal mass.
As used herein, the term "semiconductor device" refers to a silicon chip or die containing circuitry, and the term "semiconductor device assembly" refers to the semiconductor chip and associated packaging containing the chip, including external leads such as for connecting to a socket or a circuit board, and internal connections, such as bond wires, of the chip to the leads.
Commonly-owned U.S. Pat. No. 4,800,419, entitled SUPPORT ASSEMBLY FOR INTEGRATED CIRCUITS, discloses a composite support assembly for an integrated circuit chip. The support assembly includes a rigid frame that is attached to a relatively thin, flexible, tape-like structure. The tape-like structure includes a metallic layer that is etched with inner and outer lead "fingers" allowing for a short pitch, high density arrangement of the lead fingers, thereby enabling bond wires that connect a semiconductor chip to the support assembly to be relatively short. The metallic layer is supported by a segmented polyimide film layer, preferably formed of KAPTON (trademark of DuPont Corp.) or UPILEX (trademark of UBE).
Commonly-owned U.S. Pat. No. 4,771,330, entitled WIRE BONDS AND ELECTRICAL CONTACTS OF AN INTEGRATED CIRCUIT DEVICE, discloses an integrated circuit device package including a rigid frame and flexible tape assembly having wire leads between the die attach pad, conductive lead fingers and the integrated circuit (IC) chip. A dam structure prevents resin flow onto the outer lead fingers, and provides a uniform perimeter for the package.
Commonly-owned, copending U.S. patent application Ser. No. 115,228, entitled METHOD AND MEANS OF FABRICATING A SEMICONDUCTOR DEVICE PACKAGE and filed on Oct. 30, 1987, discloses a semiconductor device assembly having a patterned conductive layer, including a die attach pad and a plurality of leads, and a patterned insulating layer. A semiconductor die is seated on the die attach pad and is connected, such as by bond wires, to the leads. A silicone gel, such as Dow Corning Q1-4939, having a 1 to 10 mixing ratio of curing agent to base, is applied over the bond wires. A body frame (dam), preferably made of a polymer material such as RYTON (trademark of Phillips Chemical Co.) is positioned around the die, and an encapsulant material, such as HYSOL CNB 405-12 (trademark of Hysol) is distributed within the RYTON frame over the semiconductor die and die connections.
Commonly-owned, copending U.S. patent application Ser. No. 380,174, entitled STRIP CARRIER FOR INTEGRATED CIRCUITS and filed on Jul. 14, 1989, discloses a semiconductor device assembly having a patterned conductive layer and a patterned insulating layer, and mounted to a strip carrier providing mechanical rigidity to the semiconductor device assembly during assembly thereof. After assembly, the packaged semiconductor device assembly is excised from the strip carrier.
The aforementioned patents and applications relate to semiconductor device assemblies having a high lead count and that may operate at high speeds, both of which factors contribute to increased heat generated by the semiconductor device.